1. Technical Field
The present invention relates to a method for powering down an integrated circuit (IC) into a sleep or suspend mode while maintaining the internal state of the IC at wakeup when the system power is restored.
2. Related Art
Integrated circuits (ICs) include devices such as field programmable gate arrays (FPGAs) and Application Specific Integrated Circuits (ASICs). FPGAs are programmable, where programmability enables FPGAs to be purchased by customers and configured to provide a desired circuit. As FPGAs become more complex, they are designed to include features to enable them to emulate more complex ASICs or other components such as microcontrollers or processors.
A feature included in many integrated circuits, such as an FPGA, is a “suspend” mode pin that allows the chip to operate at low power while maintaining its internal state. It is desirable to provide a suspend mode for integrated circuits, such as an FPGA, with further improvements to enable users to easily assert and deassert the suspend mode.